Distinguishing the effects of oxide trapped charges and interface states in DDD and LATID nMOSFETs using photon emission spectroscopy
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Wai Kin Chim | C. L. Lou | D. Chan | W. Chim | J. Tao | C. Lou | D. S. H. Chan | J. M. Tao | S E Leang | C K Teow | C. K. Teow | S. Leang
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Interface state creation and charge trapping in the medium-to-high gate voltage range (V/sub d//2>or=V/sub g/
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