Modeling and verification using UML statecharts - a working guide to reactive system design, runtime monitoring and execution-based model checking

OUTLINE 1. Motivation 1.1 The Need for Computer Based Verification 1.2 The Desired Process Triangle 1.3 The Need for Integration: UML Statecharts and Formal Specifications 2. Assertion Languages, Applications, and Tools 2.1 Primary Assertion/Specification Languages: Temporal Logic and Statecharts 2.2 Applications: formal methods, run-time monitoring 2.2.1 Classical Formal Methods. 2.2.2 Runtime Monitoring and Verification. 2.2.3 Automatic Test Generation and Execution-based Model Checking. 2.2.4 Run-time Control Flow using Assertions (Exception Handling) 2.3 Writing Temporal Logic Assertions: the Process 2.4 Tools 3. Integration: UML-Statecharts Integrated with Temporal Logic Assertions 3.1 Statechart Specifications 3.2 TLCharts 3.3. Tools 4. Advanced Topics 4.1 Petri Nets for Distributed Systems. 4.2 Other Specification Languages: CTL, CTL+, Z. 4.3 Automata over Infinite Sequences. 4.4. Automata and Semigroups. 4.5 LTL vs. First Order Logic and SQL, LTL vs. Regular Expressions. 4.6 LTL and Statechart Semantics. 4.6 Knowledge Monitoring.