Exact moment matching model of transmission lines and application to interconnect delay estimation

Moment matching methods are widely used in delay estimation of interconnects modeled as transmission line networks. In this paper, we analyze the contribution of a transmission line to the moments of a resistor-transmission line-capacitor (R-T-C) network and provide a method to form a lumped moment matching model of the line. When the transmission lines are replaced by their pth order moment matching models, the network is transformed into a lumped R-L-C network such that these two networks have identical moments up to the order of p for each corresponding output node voltage. We also provide a recursive formula to compute the moments of the R-L-C network so that the moment matching techniques can be efficiently used in the delay estimation. >

[1]  Gerard V. Kopcsay,et al.  High-Speed Signal Propagation on Lossy Transmission Lines , 1990, IBM J. Res. Dev..

[2]  A. Hill,et al.  Equivalent circuit modeling of losses and dispersion in single and coupled lines for microwave and millimeter-wave integrated circuits , 1988 .

[3]  Ernest S. Kuh,et al.  A sparse matrix method for analysis of piecewise-linear resistive networks , 1972 .

[4]  Rui Wang,et al.  S-Parameter Based Macro Model of Distributed-Lumped Networks Using Exponentially Decayed Polynomial Function , 1992, 30th ACM/IEEE Design Automation Conference.

[5]  Carver Mead,et al.  Signal Delay in General RC Networks , 1984, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[6]  J. Cong,et al.  Optimal wiresizing under the distributed Elmore delay model , 1993, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD).

[7]  Ernest S. Kuh,et al.  Transient simulation of lossy interconnects based on the recursive convolution formulation , 1992 .

[8]  Ronald L. Rivest,et al.  Introduction to Algorithms , 1990 .

[9]  Wayne Wei-Ming Dai PERFORMANCE DRIVEN LAYOUT FOR THIN-FILM MULTICHIP MODULES , 1991 .

[10]  Mark Horowitz,et al.  Signal Delay in RC Tree Networks , 1983, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[11]  Ronald A. Rohrer,et al.  Interconnect simulation with asymptotic waveform evaluation (AWE) , 1992 .

[12]  T. K. Tang,et al.  Analysis of lossy multiconductor transmission lines using the asymptotic waveform evaluation technique , 1991 .

[13]  Sung-Mo Kang,et al.  Modeling and simulation of interconnection delays and crosstalks in high-speed integrated circuits , 1990 .

[14]  Tom Dhaene,et al.  Selection of lumped element models for coupled lossy transmission lines , 1992, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[15]  Hartmut Grabinski An algorithm for computing the signal propagation on lossy VLSI interconnect systems in the time domain , 1989, Integr..

[16]  Sung-Mo Kang,et al.  Computationally efficient simulation of a lossy transmission line with skin effect by using numerical inversion of Laplace transform , 1992 .

[17]  Lawrence T. Pileggi,et al.  RICE: rapid interconnect circuit evaluator , 1991, 28th ACM/IEEE Design Automation Conference.

[18]  Jeremy C. Wyatt Signal delay in rc mesh networks , 1985 .

[19]  Lawrence T. Pileggi,et al.  Asymptotic waveform evaluation for timing analysis , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[20]  Lawrence T. Pileggi,et al.  RICE: rapid interconnect circuit evaluation using AWE , 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[21]  Andrew B. Kahng,et al.  Optimal equivalent circuits for interconnect delay calculations using moments , 1994, EURO-DAC '94.

[22]  Michel S. Nakhla,et al.  Analysis of high-speed VLSI interconnects using the asymptotic waveform evaluation technique , 1992, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[23]  Sung-Mo Kang,et al.  Fast Approximation of the Transient Response of Lossy Transmission Line Trees , 1993, 30th ACM/IEEE Design Automation Conference.

[24]  Fung-Yuel Chang Waveform relaxation analysis of RLCG transmission lines , 1990 .

[25]  Lawrence T. Pillage,et al.  Skew And Delay Optimization For Reliable Buffered Clock Trees , 1993, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD).