SOTB technology, which enables perpetually reliable CPU for IoT applications
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Kazutoshi Kobayashi | Nobuyuki Sugii | Koichiro Ishibashi | Shiro Kamohara | Tomoaki Koide | Hiroki Nagatomi
[1] Mahesh Mehendale,et al. 8.3 A 10.5μA/MHz at 16MHz single-cycle non-volatile memory access microcontroller with full state retention at 108nA in a 90nm process , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.
[2] T. Hiramoto,et al. Ultralow-voltage operation of Silicon-on-Thin-BOX (SOTB) 2Mbit SRAM down to 0.37 V utilizing adaptive back bias , 2013, 2013 Symposium on VLSI Circuits.
[3] Nobuyuki Sugii,et al. A 361nA thermal run-away immune VBB generator using dynamic substrate controlled charge pump for ultra low sleep current logic on 65nm SOTB , 2014, 2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).
[4] Hideharu Amano,et al. A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14µA sleep current using Reverse Body Bias Assisted 65nm SOTB CMOS technology , 2014, 2014 IEEE COOL Chips XVII.
[5] J. Furuta,et al. A Low-Power and Area-Efficient Radiation-Hard Redundant Flip-Flop, DICE ACFF, in a 65 nm Thin-BOX FD-SOI , 2014, IEEE Transactions on Nuclear Science.
[6] K. Kobayashi,et al. A low-power and area-efficient radiation-hard redundant flip-flop, DICE ACFF, in a 65 nm thin-BOX FD-SOI , 2013, 2013 14th European Conference on Radiation and Its Effects on Components and Systems (RADECS).
[7] Pranay Prabhat,et al. 8.1 An 80nW retention 11.7pJ/cycle active subthreshold ARM Cortex-M0+ subsystem in 65nm CMOS for WSN applications , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.