Modeling and Simulation for On-Chip Power Grid Networks by Locally Dominant

Fast analysis of power grid networks has been a challenging problem for many years. The huge size renders circuit simulation inefficient and the large number of inputs further limits the application of existing Krylov-subspace macromodeling algorithms. However, strong locality has been observed that two nodes geometrically far have very small electrical impact on each other because of the exponential attenuation. However, no systematic approaches have been proposed to exploit such locality. In this paper, we propose a novel modeling and simulation scheme, which can automatically identify the dominant inputs for a given observed node in a power grid network. This enables us to build extremely compact models by projecting the system onto the locally dominant Krylov subspace corresponding to those dominant inputs only. The resulting simulation can be very fast with the compact models if we only need to view the responses of a few nodes under many different inputs. Experimental results show that the proposed method can have at least 100X speedup over SPICE-like simulations on a number of large power grid networks up to 1M nodes.

[1]  Sanjay Pant,et al.  Power Grid Physics and Implications for CAD , 2007, IEEE Design & Test of Computers.

[2]  Sani R. Nassif,et al.  Multigrid-like technique for power grid analysis , 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).

[3]  Rajendran Panda,et al.  Hierarchical analysis of power distribution networks , 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[4]  E. Bristol On a new measure of interaction for multivariable process control , 1966 .

[5]  Sheldon X.-D. Tan,et al.  ETBR: Extended Truncated Balanced Realization Method for On-Chip Power Grid Network Analysis , 2008, 2008 Design, Automation and Test in Europe.

[6]  Jacob K. White,et al.  A coordinate-transformed Arnoldi algorithm for generating guaranteed stable reduced-order models of RLC circuits , 1996, ICCAD 1996.

[7]  Eli Chiprout Fast flip-chip power grid analysis via locality and grid shells , 2004, ICCAD 2004.

[8]  Sani R. Nassif,et al.  Random walks in a supply network , 2003, DAC '03.

[9]  Roland W. Freund,et al.  Efficient linear circuit analysis by Pade´ approximation via the Lanczos process , 1994, EURO-DAC '94.

[10]  Sheldon X.-D. Tan,et al.  Advanced Model Order Reduction Techniques in VLSI Design , 2007 .

[11]  Janet Roveda,et al.  Extended Krylov subspace method for reduced order analysis of linear circuits with multiple sources , 2000, Proceedings 37th Design Automation Conference.

[12]  Charlie Chung-Ping Chen,et al.  HiPRIME: hierarchical and passivity preserved interconnect macromodeling engine for RLKC power delivery , 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[13]  Lawrence T. Pileggi,et al.  PRIMA: passive reduced-order interconnect macromodeling algorithm , 1997, ICCAD 1997.

[14]  Charlie Chung-Ping Chen,et al.  Efficient large-scale power grid analysis based on preconditioned Krylov-subspace iterative methods , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).