A Novel Synthesis Algorithm Based on Positive/Negative Control Gate

Reversible logic synthesis plays an important role in reversible computing. This paper proposes a novel algorithm for synthesizing reversible circuits in terms of PNC (Positive/Negative Control) gates. The algorithm is based on switching two output minterms with only one different variable between them step by step until the original reversible function transforms to the identity function. We also give all the 3 input /output reversible functions, reporting distributions of circuit sizes. Through synthesizing several circuits which are used in other literatures, the experimental results show better performance in reducing the gate count, so as to decrease the cost of the network.

[1]  T. Toffoli,et al.  Conservative logic , 2002, Collision-Based Computing.

[2]  A. Adamski,et al.  Design of Reversible Logic Circuits by Means of Control Gates , 2000, PATMOS.

[3]  Ralph C. Merkle,et al.  Two types of mechanical reversible logic , 1993 .

[4]  R. Landauer,et al.  Irreversibility and heat generation in the computing process , 1961, IBM J. Res. Dev..

[5]  I. Chuang,et al.  Quantum Computation and Quantum Information: Introduction to the Tenth Anniversary Edition , 2010 .

[6]  Robert Wille,et al.  BDD-based synthesis of reversible logic for large functions , 2009, 2009 46th ACM/IEEE Design Automation Conference.

[7]  Jing Zhong,et al.  Using Crosspoint Faults in Simplifying Toffoli Networks , 2006, 2006 IEEE North-East Workshop on Circuits and Systems.

[8]  Alexis De Vos,et al.  Control gates as building blocks for reversible computers , 2001 .

[9]  Chao Huang,et al.  A novel Toffoli network synthesis algorithm for reversible logic , 2009, 2009 Asia and South Pacific Design Automation Conference.

[10]  Tommaso Toffoli,et al.  Reversible Computing , 1980, ICALP.

[11]  Gerhard W. Dueck,et al.  Fredkin/Toffoli Templates for Reversible Logic Synthesis , 2003, ICCAD 2003.

[12]  Alan Mishchenko,et al.  Logic Synthesis of Reversible Wave Cascades , 2002, IWLS.

[13]  Antonio J. Acosta,et al.  Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation , 2002, Lecture Notes in Computer Science.

[14]  Morteza Saheb Zamani,et al.  A novel synthesis algorithm for reversible circuits , 2007, ICCAD 2007.

[15]  Gerhard W. Dueck,et al.  A transformation based algorithm for reversible logic synthesis , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).