Timing analysis with crosstalk as fixpoints on complete lattice

Increasing delay variation due to crosstalk has a dramatic impact on deep sub-micron technologies. It is now necessary to include crosstalk in timing analysis. But timing analysis with crosstalk is a chicken-and-egg problem since crosstalk effect in turn depends on timing behavior of a circuit. In this paper, we establish a theoretical foundation for timing analysis with crosstalk. We show that solutions to the problem are fixpoints on a complete lattice. Based on that, we prove in general the convergence of any iterative approach. We also show that, starting from different initial solutions, an iterative approach will reach different fixpoints. The current prevailing practice, which starts from the worst case solution, will always reach the greatest fixpoint (which is the loosest solution). In order to reach the least fixpoint, we need to start from the best case solution. Based on chaotic iteration and heterogeneous structures of coupled circuits, we also design techniques to speed up iterations.

[1]  David S. Johnson,et al.  Computers and In stractability: A Guide to the Theory of NP-Completeness. W. H Freeman, San Fran , 1979 .

[2]  Brian A. Davey,et al.  An Introduction to Lattices and Order , 1989 .

[3]  Kurt Keutzer,et al.  Miller factor for gate-level coupling delay calculation , 2000, IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140).

[4]  Peivand F. Tehrani,et al.  Deep sub-micron static timing analysis in presence of crosstalk , 2000, Proceedings IEEE 2000 First International Symposium on Quality Electronic Design (Cat. No. PR00525).

[5]  Yasuhiko Sasaki,et al.  Multi-aggressor relative window method for timing analysis including crosstalk delay degradation , 2000, Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044).

[6]  Sachin S. Sapatnekar,et al.  Capturing the effect of crosstalk on delay , 2000, VLSI Design 2000. Wireless and Digital Imaging in the Millennium. Proceedings of 13th International Conference on VLSI Design.