Transient Electrothermal Analysis of Multilevel Interconnects in the Presence of ESD Pulses Using the Nonlinear Time-Domain Finite-Element Method
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Qing Huo Liu | Jun-Fa Mao | Peiguo Liu | Wen-Yan Yin | Yan-Bing Shi | W. Yin | J. Mao | Peiguo Liu | Y. Shi | Qingtang Liu | Qingtang Liu
[1] Wen-Yan Yin,et al. Average power‐handling capability of the signal line in coplanar waveguides on polyimide and GaAs substrates including the irregular line edge shape effects , 2005 .
[2] Werner Weber,et al. Thermal conductivity measurements of thin silicon dioxide films in integrated circuits , 1996 .
[3] D. V. Griffiths,et al. Programming the finite element method , 1982 .
[4] J. Bernstein,et al. Short-time failure of metal interconnect caused by current pulses , 1993, IEEE Electron Device Letters.
[5] E. Rosenbaum,et al. Gate oxide reliability under ESD-like pulse stress , 2004, IEEE Transactions on Electron Devices.
[6] K. Banerjee,et al. Global (interconnect) warming , 2001 .
[7] K. T. Kaschani. Electrical overstress due to ESD induced displacement currents , 2005, Microelectron. J..
[8] Mike Golio. The RF and Microwave Handbook - 3 Volume Set , 2008 .
[9] Shahin Nazarian,et al. Thermal Modeling, Analysis, and Management in VLSI Circuits: Principles and Methods , 2006, Proceedings of the IEEE.
[10] Akram A. Salman,et al. ESD-induced oxide breakdown on self-protecting GG-nMOSFET in 0.1-/spl mu/m CMOS technology , 2003 .
[11] I. Eric,et al. Dynamic temperature rise of shielded MR sensors during simulated electrostatic discharge pulses of variable pulse width , 2004, 2004 Electrical Overstress/Electrostatic Discharge Symposium.
[12] W. Yin,et al. Frequency-Thermal Characterization of On-Chip Transformers With Patterned Ground Shields , 2007, IEEE Transactions on Microwave Theory and Techniques.
[13] Chenming Hu,et al. Characterization of self-heating in advanced VLSI interconnect lines based on thermal finite element simulation , 1998 .
[14] John Michael Golio. The RF and Microwave Hanbook , 2001 .
[15] P. W. Webb,et al. Use of the three-dimensional TLM method in the thermal simulation and design of semiconductor devices , 1992 .
[16] Chenming Hu,et al. High-current failure model for VLSI interconnects under short-pulse stress conditions , 1997, IEEE Electron Device Letters.
[17] R. K. Keenan,et al. Some fundamental aspects of ESD testing , 1991, IEEE 1991 International Symposium on Electromagnetic Compatibility.
[18] X.T. Dong,et al. Wide-band characterization of average power handling capabilities of some microstrip interconnects on polyimide and polyimide/GaAs substrates , 2005, IEEE Transactions on Advanced Packaging.
[19] David Pommerenke,et al. Numerical modeling of electrostatic discharge generators , 2003 .
[20] C. Leroux,et al. Investigations on the thermal behavior of interconnects under ESD transients using a simplified thermal RC network , 1998, Electrical Overstress/ Electrostatic Discharge Symposium Proceedings. 1998 (Cat. No.98TH8347).
[21] Jian-Qiang Lu,et al. Modeling Thermal Stresses in 3-D IC Interwafer Interconnects , 2006, IEEE Transactions on Semiconductor Manufacturing.
[22] Y. Higashiyama,et al. Multiple-spark discharge occurring between a charged conductive plate and a grounded sphere electrode , 2004, IEEE Transactions on Industry Applications.
[23] Jinliang He,et al. New mathematical descriptions of ESD current waveform based on the polynomial of pulse function , 2006, IEEE Transactions on Electromagnetic Compatibility.
[24] Kaustav Banerjee,et al. Compact modeling and SPICE-based simulation for electrothermal analysis of multilevel ULSI interconnects , 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).
[25] Pinaki Mazumder,et al. Accelerated Chip-Level Thermal Analysis Using Multilayer Green's Function , 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[26] Sergey Bychikhin,et al. Multiple-time-instant 2D thermal mapping during a single ESD event , 2004, Microelectron. Reliab..
[27] Werner Weber,et al. Thermal Conductivity of Thin Silicon Dioxide Films in Integrated Circuits , 1995, ESSDERC '95: Proceedings of the 25th European Solid State Device Research Conference.
[28] Xiang Gui,et al. Thermal simulation of thin-film interconnect failure caused by high current pulses , 1995 .
[29] K. Banerjee,et al. Scaling analysis of multilevel interconnect temperatures for high-performance ICs , 2005, IEEE Transactions on Electron Devices.
[30] Jianfeng Xu,et al. Transient Thermal Analysis of GaN Heterojunction Transistors (HFETs) for High-Power Applications , 2007, IEEE Microwave and Wireless Components Letters.
[31] Hani Ragai,et al. Modelling of thermal failure of metallic interconnects under electrostatic discharge transients , 2005 .