Performance and processing time enhancement of LDPC decoder using stopping node modified Sum Product algorithm
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Gang Wang | Georgia Rugumira | Nguyen Thi Dieu Linh | Abdelhafidh Barkana | G. Wang | Georgia Rugumira | A. Barkana
[1] William P. Marnane,et al. Efficient low-density parity-check decoding , 2004 .
[2] Chia-Yu Lin,et al. Node operation reduced decoding for LDPC codes , 2009, 2009 IEEE International Symposium on Circuits and Systems.
[3] D.J.C. MacKay,et al. Good error-correcting codes based on very sparse matrices , 1997, Proceedings of IEEE International Symposium on Information Theory.
[4] U. Reimers,et al. Digital video broadcasting , 1998, IEEE Commun. Mag..
[5] Joachim Hagenauer,et al. Iterative decoding of binary block and convolutional codes , 1996, IEEE Trans. Inf. Theory.
[6] Radford M. Neal,et al. Near Shannon limit performance of low density parity check codes , 1996 .
[7] Myung Hoon Sunwoo,et al. New simplified sum-product algorithm for low complexity LDPC decoding , 2008, 2008 IEEE Workshop on Signal Processing Systems.
[8] Robert G. Gallager,et al. Low-density parity-check codes , 1962, IRE Trans. Inf. Theory.
[9] P. T. Mathiopoulos,et al. Simplified sum-product algorithm for decoding LDPC codes with optimal performance , 2009 .
[10] Shu Lin,et al. Two simple stopping criteria for turbo decoding , 1999, IEEE Trans. Commun..
[11] A. Glavieux,et al. Near Shannon limit error-correcting coding and decoding: Turbo-codes. 1 , 1993, Proceedings of ICC '93 - IEEE International Conference on Communications.
[12] Barry G. Evans,et al. Modified sum-product algorithms for decoding low-density parity-check codes , 2007, IET Commun..