Design of Efficient XTEA Using Verilog Shweta Gaba , Iti Aggarwal , Dr

In this age of viruses and hackers of electronic eavesdropping and electronic fraud, security is paramount. A cryptographic system ( or a cipher system) is a method of hiding data so that only certain people can view it. A cryptographic system typically consists of algorithms, keys, and key management facilities. There are several algorithms to choose from that vary in the security they provide, their size, the time it takes to encrypt or decrypt a block of data. In this paper, we analyze and evaluate the development of a cheap and relatively fast hardware implementation of the extended tiny encryption algorithm (XTEA). Originally the research was split into separate encipher/decipher units, but these have now been combined into a single unit. The design will start by using finite state machine (FSMs) and will use Verilog hardware description language to describe the design. Minimizing the chip area and security transmission of data will be our main goal. The targeted hardware systems are the reconfigurable Spartan III and Xilinx Virtex IV modern field programmable gate arrays (FPGAs).