Extraction and use of neural network models in automated synthesis of operational amplifiers

Fast and accurate performance estimation methods are essential to automated synthesis of analog circuits. Development of analog performance models is difficult due to the highly nonlinear nature of various analog performance parameters. This paper presents a neural network-based methodology for creating fast and efficient models for estimating the performance parameters of CMOS operational amplifier topologies. Effective methods for generation and use of the training data are proposed to enhance the accuracy of the neural models. The efficiency and accuracy of the resulting performance models are demonstrated via their use in a genetic algorithm-based circuit synthesis system. The genetic synthesis tool optimizes a fitness function based on user-specified performance constraints. The performance parameters of the synthesized circuits are validated by SPICE simulations and compared with those predicted by the neural network models. Experimental studies demonstrate that neural network modeling is an effective, fast, and accurate methodology for performance estimation.

[1]  A. Pacelli.  A local circuit topology for inductive parasitics , 2002, ICCAD 2002.

[2]  Jean-Marc Desharnais,et al.  A comparison of software effort estimation techniques: Using function points with neural networks, case-based reasoning and regression models , 1997, J. Syst. Softw..

[3]  Willy Sansen,et al.  Analog Circuit Design Optimization based on Symbolic Simulation and Simulated Annealing , 1989, ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference.

[4]  Rob A. Rutenbar,et al.  Computer-aided design of analog and mixed-signal integrated circuits , 2000, Proceedings of the IEEE.

[5]  Rob A. Rutenbar,et al.  ASTRX/OBLX: Tools for Rapid Synthesis of High-Performance Analog Circuits , 1994, 31st Design Automation Conference.

[6]  Yun Li,et al.  GA automated design and synthesis of analog circuits with practical constraints , 2001, Proceedings of the 2001 Congress on Evolutionary Computation (IEEE Cat. No.01TH8546).

[7]  Georges Gielen,et al.  ISAAC: a symbolic simulator for analog integrated circuits , 1989, IEEE J. Solid State Circuits.

[8]  Georges Gielen,et al.  Symbolic analysis methods and applications for analog circuits: a tutorial overview , 1994, Proc. IEEE.

[9]  Rob A. Rutenbar,et al.  Anaconda: simulation-based synthesis of analog circuits viastochastic pattern search , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[10]  Kurt Hornik,et al.  Approximation capabilities of multilayer feedforward networks , 1991, Neural Networks.

[11]  Rob A. Rutenbar,et al.  DELIGHT.SPICE: An OptimizationBased System for the Design of Integrated Circuits , 2002 .

[12]  Georges G. E. Gielen,et al.  Simulation-based automatic generation of signomial and posynomial performance models for analog integrated circuit sizing , 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).

[13]  Roop L. Mahajan,et al.  Applications of knowledge‐based artificial neural network modeling to microwave components , 1999 .

[14]  Brian A. A. Antao,et al.  ARCHGEN: Automated synthesis of analog systems , 1995, IEEE Trans. Very Large Scale Integr. Syst..

[15]  Georges Gielen,et al.  An intelligent analog IC design system based on manipulation of design equations , 1990, IEEE Proceedings of the Custom Integrated Circuits Conference.

[16]  John M. Cohn.  Analog Device-Level Layout Automation , 1994 .

[17]  Bozena Kaminska,et al.  FPAD: a fuzzy nonlinear programming approach to analog circuit design , 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[18]  S.M. El-Ghazaly,et al.  A global modeling approach using artificial neural network , 1999, 1999 IEEE MTT-S International Microwave Symposium Digest (Cat. No.99CH36282).

[19]  Alberto L. Sangiovanni-Vincentelli,et al.  DELIGHT.SPICE: an optimization-based system for the design of integrated circuits , 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[20]  Rob A. Rutenbar,et al.  Synthesis of high-performance analog circuits in ASTRX/OBLX , 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[21]  Rob A. Rutenbar,et al.  ANACONDA: robust synthesis of analog circuits via stochastic pattern search , 1999, Proceedings of the IEEE 1999 Custom Integrated Circuits Conference (Cat. No.99CH36327).

[22]  Fang Wang,et al.  Optimization of high‐speed VLSI interconnects: A review (invited article) , 1997 .

[23]  Ranga Vemuri,et al.  A genetic approach to simultaneous parameter space exploration and constraint transformation in analog synthesis , 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

[24]  Stephen P. Boyd,et al.  Optimal design of a CMOS op-amp via geometric programming , 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[25]  Georges Gielen,et al.  Analog Circuit Design Optimization based on Symbolic Simulation and Simulated Annealing , 1989 .

[26]  Fathey M. El-Turky,et al.  BLADES: an artificial intelligence approach to analog circuit design , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[27]  Qi-Jun Zhang,et al.  Neural Networks for Microwave Modeling: Model Development Issues and Nonlinear Modeling Techniques , 2001 .

[28]  Stephen P. Boyd,et al.  GPCAD: a tool for CMOS op-amp synthesis , 1998, 1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287).

[29]  G. L. Creech,et al.  Artificial neural networks for fast and accurate EM-CAD of microwave circuits , 1997 .

[30]  Rob A. Rutenbar,et al.  MAELSTROM: efficient simulation-based synthesis for custom analog cells , 1999, DAC '99.

[31]  R. E. Massara,et al.  A macromodeling approach to the synthesis of analog circuits using circuit decomposition and numerical circuit analysis , 1992, [1992] Proceedings of the 35th Midwest Symposium on Circuits and Systems.

[32]  Yoshikane Takahashi,et al.  Generalization and Approximation Capabilities of Multilayer Networks , 1993, Neural Computation.

[33]  Phillip E Allen,et al.  CMOS Analog Circuit Design , 1987 .

[34]  Pradip Mandal,et al.  CMOS op-amp sizing using a geometric programming formulation , 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[35]  Mattan Kamon,et al.  FastHenry: A Multipole-Accelerated 3-D Inductance Extraction Program , 1993, 30th ACM/IEEE Design Automation Conference.

[36]  Ron M. Kielkowski.  Inside SPICE , 1994 .

[37]  Michael E. Wall,et al.  Galib: a c++ library of genetic algorithm components , 1996 .

[38]  P.R. Gray,et al.  OPASYN: a compiler for CMOS operational amplifiers , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[39]  Domine Leenaerts,et al.  DARWIN: CMOS opamp Synthesis by Means of a Genetic Algorithm , 1995, 32nd Design Automation Conference.

[40]  Fang Wang,et al.  A new macromodeling approach for nonlinear microwave circuits based on recurrent neural networks , 2000, IMS 2000.