A very small, flexible, high-quality, full-duplex 2.4-kbit/s linear predictive vocoder has been implemented with commercially available integrated circuits. This fully digital realization is based on a distributed signal processing architecture employing three Nippon Electric Company (NEC) µPD7720 signal processing interface (SPI) single-chip microcomputers. One SPI implements the LPC analyzer, a second implements the Gold pitch and voicing decision algorithm, white the third µPD7720 implements the excitation generator and synthesizer. An Intel 8085-based 8-bit microcomputer is used for data transfer, control and multiplexing functions, and communications with the host terminal. The LPC chip set achieves high flexibility by accepting run time initialization options from the Intel 8085. These parameters include choice of linear predictive model (<= 15), analysis and synthesis frame size, and speech sampling frequency, as well as choice of speech input and output coding formats (linear or µ-255 law) and choice of analog or digjtal pre- and deemphasis. A total of 16 integrated circuits is used in the LPC vocoder with a power disipation of 5.5 W and occupying 18 in/sup 2/ of circuit area.
[1]
R. Crochiere,et al.
Speech Coding
,
1979,
IEEE Transactions on Communications.
[2]
Joseph Tierney,et al.
Microprocessor realization of a linear predictive vocoder
,
1977
.
[3]
J. Le Roux,et al.
A fixed point computation of partial correlation coefficients in linear prediction
,
1977
.
[4]
J. Markel,et al.
A linear prediction vocoder simulation based upon the autocorrelation method
,
1974
.
[5]
Bernard Gold.
Computer Program for Pitch Extraction
,
1962
.
[6]
Joel A. Feldman,et al.
A modular approach to packet voice terminal hardware design
,
1981,
AFIPS '81.
[7]
Nick G. Kingsbury,et al.
A robust channel vocoder for adverse environments
,
1980,
ICASSP.
[8]
M. Leonardi,et al.
Microprocessor Implementation Of A Linear Predictive Coder
,
1979
.