An efficient implementation of multi-prime RSA on DSP processor

The Rivest, Shamir and Adleman (1978) RSA algorithmis a popular cryptography algorithm widely used in signing and encrypting operations for security systems. Generally, the software implementations of the RSA algorithm are based on 2-prime RSA. The multi-prime RSA has been proposed to speed up RSA implementations. Both 2-prime and multi-prime implementations require squaring reduction and multiplication reduction of multi-precision integers. The Montgomery (1985) reduction algorithm is the most efficient for the squaring and multiplication reductions. We present a new method to implement the Montgomery squaring reduction, which speeds up squaring reduction by 10-15% for various key sizes. Furthermore, a multi-prime 1024-bit RSA signing operation is implemented on the TI TMS320C6201 DSP processor with the new reduction method. As a result, the signing operation can be finished within 6 ms, which is about twice faster than the RSA implementation of Itoh, Takenaka, Torii, Temma and Kurihara (see Proc. of CHES'99, p.61-71, 1999) on the same DSP platform.

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