Modeling of non-uniform heat generation in LDMOS transistors

This work is devoted to the heat dissipation analysis in LDMOS transistors operating at high current conditions. Hence, a new expression for the Joule heat generated by electron current is provided to simplify the LDMOS electro-thermal modeling, thus giving physical insight and predicting hot spots. The model is based on the semiconductor physics and the required input data are the device geometrical and technological parameters as well as the applied bias.

[1]  Krishna Shenai,et al.  Thermal and package performance limitations in LDMOSFET's for RFIC applications , 1999 .

[2]  Ronghua Zhu,et al.  Experimental and theoretical analysis of energy capability of RESURF LDMOSFETs and its correlation with static electrical safe operating area (SOA) , 2002 .

[3]  Krishna Shenai,et al.  Scaling constraints imposed by self-heating in submicron SOI MOSFET's , 1995 .

[4]  I. Cortes,et al.  A linear heat generation thermal model for ldmos basic cell self-heating analysis in transient state , 2003 .

[5]  Jerry G. Fossum,et al.  New physical insights and models for high-voltage LDMOST IC CAD , 1991 .

[6]  Zhiping Yu,et al.  RF LDMOS characterization and its compact modeling , 2001, 2001 IEEE MTT-S International Microwave Sympsoium Digest (Cat. No.01CH37157).

[7]  P. Antognetti,et al.  Power integrated circuits: Physics, design, and applications , 1986 .

[8]  Vincenzo d'Alessandro,et al.  A critical review of thermal models for electro-thermal simulation , 2002 .

[9]  O. Valenzuela,et al.  Mechanism of power dissipation capability of power MOSFET devices: comparative study between LDMOS and VDMOS transistors , 2001, Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216).

[10]  J. Black Electromigration failure modes in aluminum metallization for semiconductor devices , 1969 .

[11]  B. Murari Reliability of smart power devices , 1997 .

[12]  W. Redman-White,et al.  Charge model for SOI LDMOST with lateral doping gradient , 2001, Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216).

[13]  J. Appels,et al.  High voltage thin layer devices (RESURF devices) , 1979, 1979 International Electron Devices Meeting.

[14]  Chenming Hu,et al.  Characterization of self-heating in advanced VLSI interconnect lines based on thermal finite element simulation , 1998 .

[15]  Massimo Vanzi,et al.  A physically based mobility model for numerical simulation of nonplanar devices , 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[16]  Kambiz Vafai,et al.  Modeling of non-uniform heat dissipation and prediction of hot spots in power transistors , 1998 .

[17]  M. Vermandel,et al.  Investigations and Physical Modelling of Saturation Effects in Lateral DMOS Transistor Architectures Based on the Concept of Intrinsic Drain Voltage , 2001, 31st European Solid-State Device Research Conference.

[18]  B. Hofflinger,et al.  A 100-V lateral DMOS transistor with a 0.3-micrometer channel in a 1-micrometer silicon-film-on-insulator-on-silicon , 1991 .