Multigrid on GPU: tackling power grid analysis on parallel SIMT platforms

The challenging task of analyzing on-chip power (ground) distribution networks with multi-million node complexity and beyond is key to todaypsilas large chip designs. For the first time, we show how to exploit recent massively parallel single-instruction multiple-thread (SIMT) based graphics processing unit (GPU) platforms to tackle power grid analysis with promising performance. Several key enablers including GPU-specific algorithm design, circuit topology transformation, workload partitioning, performance tuning are embodied in our GPU-accelerated hybrid multigrid algorithm, GpuHMD, and its implementation. In particular, a proper interplay between algorithm design and SIMT architecture consideration is shown to be essential to achieve good runtime performance. Different from the standard CPU based CAD development, care must be taken to balance between computing and memory access, reduce random memory access patterns and simplify flow control to achieve efficiency on the GPU platform. Extensive experiments on industrial and synthetic benchmarks have shown that the proposed GpuHMD engine can achieve 100times runtime speedup over a state-of-the-art direct solver and be more than 15times faster than the CPU based multigrid implementation. The DC analysis of a 1.6 million-node industrial power grid benchmark can be accurately solved in three seconds with less than 50 MB memory on a commodity GPU. It is observed that the proposed approach scales favorably with the circuit complexity, at a rate about one second per million nodes.

[1]  Sani R. Nassif,et al.  Power grid analysis using random walks , 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[2]  Rajendran Panda,et al.  Hierarchical analysis of power distribution networks , 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[3]  Charlie Chung-Ping Chen,et al.  Efficient large-scale power grid analysis based on preconditioned Krylov-subspace iterative methods , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

[4]  Dinesh Manocha,et al.  LU-GPU: Efficient Algorithms for Solving Dense Linear Systems on Graphics Hardware , 2005, ACM/IEEE SC 2005 Conference (SC'05).

[5]  Guillaume Caumon,et al.  Concurrent Number Cruncher: An Efficient Sparse Linear Solver on the GPU , 2007, HPCC.

[6]  Sani R. Nassif,et al.  Power grid analysis benchmarks , 2008, 2008 Asia and South Pacific Design Automation Conference.

[7]  Martin D. F. Wong,et al.  Fast algorithms for IR drop analysis in large power grid , 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..

[8]  Wen-mei W. Hwu,et al.  Optimization principles and application performance evaluation of a multithreaded GPU using CUDA , 2008, PPoPP.

[9]  Danny C. Sorensen,et al.  Parallel domain decomposition for simulation of large-scale power grids , 2007, ICCAD 2007.

[10]  William L. Briggs,et al.  A multigrid tutorial , 1987 .

[11]  Sani R. Nassif,et al.  Multigrid-like technique for power grid analysis , 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).

[12]  Sani R. Nassif,et al.  Power grid reduction based on algebraic multigrid principles , 2003, DAC '03.

[13]  Min Zhao,et al.  Power Grid Analysis and Optimization Using Algebraic Multigrid , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.