A Pseudorandom Number Generator Based on Time-Variant Recursion of Accumulators

This brief presents a pseudorandom number generator that requires very low resources from the hardware design point of view. It is based on a chain of digital accumulators whose coefficients are varied by an auxiliary low-complexity linear feedback shift register. We present a predictability and periodicity analysis of the sequences generated by the proposed architecture to show that the system is a good candidate to be used for applications requiring high-quality pseudorandom sequences in portable devices. The statistical behavior of the proposed solution is also validated by tests from the National Institute of Standards and Technology. The generated pseudorandom sequences pass all tests at both the level-one and level-two approaches.

[1]  Edmund Y. Lam,et al.  Effective Uses of FPGAs for Brute-Force Attack on RC4 Ciphers , 2008, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[2]  T. Riley,et al.  Delta-sigma modulation in fractional-N frequency synthesis , 1993 .

[3]  Riccardo Rovatti,et al.  Second-level NIST Randomness Tests for Improving Test Reliability , 2007, 2007 IEEE International Symposium on Circuits and Systems.

[4]  Donald Ervin Knuth,et al.  The Art of Computer Programming , 1968 .

[5]  Juha Kostamovaara,et al.  On randomization of digital delta-sigma modulators with DC inputs , 2006, 2006 IEEE International Symposium on Circuits and Systems.

[6]  Takuji Nishimura,et al.  Mersenne twister: a 623-dimensionally equidistributed uniform pseudo-random number generator , 1998, TOMC.

[7]  Wayne Luk,et al.  A comparison of CPUs, GPUs, FPGAs, and massively parallel processor arrays for random number generation , 2009, FPGA '09.

[8]  Khaled Benkrid,et al.  Mersenne Twister Random Number Generation on FPGA, CPU and GPU , 2009, 2009 NASA/ESA Conference on Adaptive Hardware and Systems.

[9]  Abbes Amira,et al.  High Performance FPGA Implementation of the Mersenne Twister , 2008, 4th IEEE International Symposium on Electronic Design, Test and Applications (delta 2008).

[10]  Franco Maloberti,et al.  Time variant digital sigma-delta modulator for fractional-N frequency synthesizers , 2009, 2009 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT).

[11]  J. D. Lipson Elements of algebra and algebraic computing , 1981 .

[12]  G. Temes Delta-sigma data converters , 1994 .

[13]  R. Davis,et al.  The data encryption standard in perspective , 1978, IEEE Communications Society Magazine.

[14]  Elaine B. Barker,et al.  A Statistical Test Suite for Random and Pseudorandom Number Generators for Cryptographic Applications , 2000 .

[15]  Manuel Blum,et al.  Comparison of Two Pseudo-Random Number Generators , 1982, CRYPTO.

[16]  Michael Peter Kennedy,et al.  Architectures for Maximum-Sequence-Length Digital Delta-Sigma Modulators , 2008, IEEE Transactions on Circuits and Systems II: Express Briefs.

[17]  Alfred Menezes,et al.  Handbook of Applied Cryptography , 2018 .

[18]  David Kearney,et al.  An Area Time Efficient Field Programmable Mersenne Twister Uniform Random Number Generator , 2006, ERSA.

[19]  R. Rovatti,et al.  A Fast Chaos-based True Random Number Generator for Cryptographic Applications , 2006, 2006 Proceedings of the 32nd European Solid-State Circuits Conference.