Tight non-linear loop timing estimation
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[1] Alexander V. Veidenbaum,et al. Innovative Architecture for Future Generation High-Performance Processors and Systems , 2003, Innovative Architecture for Future Generation High-Performance Processors and Systems, 2003.
[2] Eugene V. Zima. Simplification and optimization transformations of chains of recurrences , 1995, ISSAC '95.
[3] K. A. Gallivan,et al. An efficient algorithm for pointer-to-array access conversion for compiling and optimizing DSP applications , 2001, 2001 Innovative Architecture for Future Generation High-Performance Processors and Systems.
[4] David B. Whalley,et al. Supporting Timing Analysis by Automatic Bounding of Loop Iterations , 2000, Real-Time Systems.
[5] Constantine D. Polychronopoulos,et al. Symbolic analysis for parallelizing compilers , 1996, TOPL.
[6] Thomas Fahringer,et al. Symbolic evaluation for parallelizing compilers , 1997, ICS '97.
[7] O. Bachmann. Chains of recurrences , 1997 .
[8] Robert A. van Engelen,et al. Efficient Symbolic Analysis for Optimizing Compilers , 2001, CC.
[9] Rizos Sakellariou. Symbolic Evaluation of Sums for Parallelising Compilers , 1997 .
[10] David B. Whalley,et al. Parametric Timing Analysis , 2001, OM '01.