An extended architecture to optimize execution time of 3D image processing deflectometry algorithm using FPGA

The use of image processing is being accelerated over the past years in areas, including artificial intelligence, medical field, remote sensing and microscopic imaging. For 3D reconstruction of the objects, deflectometry is used to collect topographic information of surfaces. Due to computationally intensive nature of the algorithm, the execution time is one of the challenges faced by the deflectometry. In this paper, an extended FPGA based architecture is proposed to execute and improve the performance of deflectometry algorithm. The whole process consists of several stages, including initialization, acquisition and processing of data. The main idea is to utilize the optimizations e.g., pipelining, parallelization, provided by an FPGA to improve the performance of the algorithm. However, the advantage of parallelization can only be utilized if the associated algorithm contains the number of tasks, which can run independent of each other. For this reason, the deflectometry algorithm is adapted to the architecture of an FPGA to improve the performance. After successful realization of proposed architecture, the results have shown that performance is significantly improved in terms of execution time. Moreover, a rapid design development methodology is employed to decrease the prototyping time.