FPGA based design of Generic Multilevel Built In Test Equipment for radars

Built In Test Equipments are used to simulate targets to check functionality of different subsystems and the performance (like ECCM) of the radar as a whole. We present an Field Programmable Gate Array (FPGA) based design of a Generic Multilevel Built In Test Equipment (BITE) capable of simulating target echo at Intermediate Frequency (IF), Radio Frequency (RF) levels and at Field. The design also closely simulates the target behavior, like motion in range and azimuth, different doppler, different modulation codes and multiple targets. The implementation solution presented utilizes the efficient FPGA resources so as to meet the timings in crucial applications. The work highlights the features of the design with real implementation and test in a radar system.

[1]  P. Vaidyanathan Multirate Systems And Filter Banks , 1992 .

[2]  R.G. Shenoy Analysis of multirate components and application to multirate filter design , 1994, Proceedings of ICASSP '94. IEEE International Conference on Acoustics, Speech and Signal Processing.

[3]  M. Skolnik,et al.  Introduction to Radar Systems , 2021, Advances in Adaptive Radar Detection and Range Estimation.