An Adaptive Impedance Tuning CMOS Circuit for

The difficulties encountered in matching an antenna to its optimal impedance are reduced with an adaptive 0.35- m CMOS circuit based on several switched shunt capacitors ar- ranged in capacitor banks and on a few external series inductors. As high-quality inductors are difficult to obtain in CMOS, the inductors are placed either in an low-temperature cofired ceramic (LTCC) substrate or is a lumped component outside the core cir- cuit. The circuits, presented here through a range of simulations, are optimized to function within the ISM 2.4-GHz band, but the general approach employed to improve matching can be used for other frequency bands as well. The circuits discussed provide a match for every impedance with . There is a 1-dB power loss for a perfect trans- formation, a break-even point at , and a 3-dB increase in delivered power for .