Timing-driven , Congestion Minimization , and Low Power Placement for Standard Cell Layouts

in spring 2003. This paper presents a placement method, which considers timing requirement, congestion minimization, and power dissipation simultaneously. We used a force-directed method and added additional forces to avoid routing congestion. Power dissipation is also minimized while timing requirement is met. This method optimizes placement for low power in early iterations but forces timing requirement to become dominant as iteration increases. Psudo-code of this algorithm is provided.