Barrel shifters are often utilized by embedded digital signal processors and general-purpose processors to manipulate data. This paper examines design alternatives for barrel shifters that perform the following functions: shift right logical, shift right arithmetic, rotate right, shift left logical, shift left arithmetic, and rotate left. Four different barrel shifter designs are presented and compared in terms of area and delay for a variety of operand sizes. This paper also examines techniques for detecting results that overflow and results of zero in parallel with the shift or rotate operation. Several Java programs are developed to generate structural VHDL models for each of the barrel shifters. Synthesis results show that data-reversal barrel shifters have less area and mask-based data-reversal barrel shifters have less delay than other designs. Mask-based data-reversal barrel shifters are especially attractive when overflow and zero detection is also required, since the detection is performed in parallel with the shift or rotate operation.
[1]
Matthew Rudolf Pillmeier.
Barrel shifter design, optimization, and analysis
,
2001
.
[2]
Mary Jane Irwin,et al.
Power comparisons for barrel shifters
,
1996,
ISLPED '96.
[3]
Electronics Letters
,
1965,
Nature.
[4]
Peter A. Beerel,et al.
Statistically optimized asynchronous barrel shifters for variable length codecs
,
1999,
Proceedings. 1999 International Symposium on Low Power Electronics and Design (Cat. No.99TH8477).
[5]
Wu-Shiung Feng,et al.
Multilevel barrel shifter for CORDIC design
,
1996
.
[6]
Veljko Milutinovic,et al.
Multiplier/Shifter Design Tradeoffs in a 32-bit Microprocessor
,
1989,
IEEE Trans. Computers.
[7]
Sung-Mo Kang,et al.
A new design of a fast barrel switch network
,
1992
.
[8]
J. A. Michell,et al.
Fully pipelined TSPC barrel shifter for high-speed applications
,
1995
.