Electromagnetic Characteristics of Multiport TSVs Using L-2L De-Embedding Method and Shielding TSVs

This paper presents an L-2L de-embedding method for characterizing the electromagnetic properties of through-silicon-vias (TSVs) in 3-D ICs. To the best of our knowledge, this is the first paper that discusses the use of de-embedding method for multiport TSVs. The L-2L de-embedding structure and the analysis algorithm are first introduced. Then, the techniques for meeting two crucial requirements in accurately applying the method on multiport TSVs are proposed. To meet these two requirements, the de-embedding structure is designed to enhance the symmetry and the shielding TSVs are used to decrease the mutual admittance. The simulation results show that with the appropriate design, the shielding TSVs are able to greatly reduce the mutual admittance with little impact on TSVs and RDLs. Finally, the performance of the designed structures with and without shielding TSVs is examined via both full-wave simulation and the measurements. With the full-wave simulation results of TSVs as reference, it turns out that the de-embedding accuracy is significantly improved with the shielding TSVs. Moreover, the de-embedding results based on the measurements show good agreements with those of the simulation ones.

[1]  R. Tummala,et al.  Rigorous Electrical Modeling of Through Silicon Vias (TSVs) With MOS Capacitance Effects , 2011, IEEE Transactions on Components, Packaging and Manufacturing Technology.

[2]  Tzong-Lin Wu,et al.  ABF-Based TSV Arrays With Improved Signal Integrity on 3-D IC/Interposers: Equivalent Models and Experiments , 2013, IEEE Transactions on Components, Packaging and Manufacturing Technology.

[3]  Tzyy-Sheng Horng,et al.  Wideband and scalable equivalent-circuit model for differential through silicon vias with measurement verification , 2013, 2013 IEEE 63rd Electronic Components and Technology Conference.

[4]  R. Suaya,et al.  Compact AC Modeling and Performance Analysis of Through-Silicon Vias in 3-D ICs , 2010, IEEE Transactions on Electron Devices.

[5]  Jun Li,et al.  Double-Shielded Interposer With Highly Doped Layers for High-Speed Signal Propagation , 2014, IEEE Transactions on Electromagnetic Compatibility.

[6]  Wen-Yan Yin,et al.  Electrical Modeling of Three-Dimensional Carbon-Based Heterogeneous Interconnects , 2014, IEEE Transactions on Nanotechnology.

[7]  Er-Ping Li,et al.  Modeling of Through-Silicon Vias (TSV) in 3D Integration , 2012 .

[8]  Bashir M. Al-Hashimi,et al.  Online Fault Tolerance Technique for TSV-Based 3-D-IC , 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[9]  Cheolbok Kim,et al.  High frequency characterization and analytical modeling of through glass via (TGV) for 3D thin-film interposer and MEMS packaging , 2013, 2013 IEEE 63rd Electronic Components and Technology Conference.

[10]  Yintang Yang,et al.  Electrical Modeling and Characterization of Shield Differential Through-Silicon Vias , 2015, IEEE Transactions on Electron Devices.

[11]  Er-Ping Li,et al.  Electrical Modeling and Design for 3D System Integration: 3D Integrated Circuits and Packaging, Signal Integrity, Power Integrity and EMC , 2012 .

[12]  Junho Lee,et al.  High-Frequency Scalable Electrical Model and Analysis of a Through Silicon Via (TSV) , 2011, IEEE Transactions on Components, Packaging and Manufacturing Technology.

[13]  Qiang Xu,et al.  A Low-Cost TSV Test and Diagnosis Scheme Based on Binary Search Method , 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[14]  Yiyu Shi,et al.  On the Efficacy of Through-Silicon-Via Inductors , 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[15]  M. F. Chen,et al.  TSV RF de-embedding method and modeling for 3DIC , 2012, 2012 SEMI Advanced Semiconductor Manufacturing Conference.

[16]  Zheyao Wang,et al.  Thermal and Electrical Reliability Tests of Air-Gap Through-Silicon Vias , 2015, IEEE Transactions on Device and Materials Reliability.

[17]  Xi Chen,et al.  Wideband Modeling and Characterization of Differential Through-Silicon Vias for 3-D ICs , 2016, IEEE Transactions on Electron Devices.

[18]  Jun Li,et al.  A Shielding Structure for Crosstalk Reduction in Silicon Interposer , 2016, IEEE Microwave and Wireless Components Letters.

[19]  Xing-Chang Wei,et al.  Modeling and measurement of a novel shielding design in silicon interposer , 2016, 2016 IEEE International Symposium on Electromagnetic Compatibility (EMC).

[20]  Junho Lee,et al.  High-Frequency Scalable Modeling and Analysis of a Differential Signal Through-Silicon Via , 2014, IEEE Transactions on Components, Packaging and Manufacturing Technology.

[21]  Chuan Seng Tan,et al.  Study of Near-Surface Stresses in Silicon Around Through-Silicon Vias at Elevated Temperatures by Raman Spectroscopy and Simulations , 2015, IEEE Transactions on Device and Materials Reliability.

[22]  Yervant Zorian,et al.  Testing 3D chips containing through-silicon vias , 2009, 2009 International Test Conference.

[23]  Madhavan Swaminathan,et al.  A Rigorous Model for Through-Silicon Vias With Ohmic Contact in Silicon Interposer , 2013, IEEE Microwave and Wireless Components Letters.

[24]  Jun Li,et al.  Accurate Field-Circuit Hybrid Modeling of High-Density Through Glass Via Arrays by Using Perfect Magnetic Conductors and Cylindrical Mode Expansion , 2016, IEEE Transactions on Components, Packaging and Manufacturing Technology.

[25]  Chu-Shik Kang,et al.  Precision depth measurement of through silicon vias (TSVs) on 3D semiconductor packaging process. , 2012, Optics express.

[26]  Zhiming Chen,et al.  Wideband Capacitance Evaluation of Silicon–Insulator–Silicon Through-Silicon-Vias for 3D Integration Applications , 2016, IEEE Electron Device Letters.