MOS ADC-filter combination that does not require precision analog components

AN OVERSAMPLE-AND-DECIMATE ARCHITECTURE yielding a analog-to-digital interface system with a built-in maskprogrammable digital antialias filter in standard 5V digital MOS technology will be reported. Unlike other MOS A/D converter techniques, this approach requires no precision component ratios or precision comparator, nor a double-polysilicon or other special capacitor structure. Prototype devices display approximately 12b converter linearity at an 8kHz output rate with a single 5V power supply and a total die area of 4 8mm? The low supply voltage and simplified process requirements are attractive for scaled MOS fabrication technologies. This is intended as a linear (non-companding) analog-interface block for constant-sampling-rate applications uch as speech processing. The system is based on l b A/D conversion, downsampled 256 times by a 1024-point, finite-impulse-response (FIR) digital lowpass filter. Such a configuration can display a net resolution exceeding the performance of the internal analog components, and since the bulk of the circuitry is digital, it benefits from continued technology scalmg. It differs also from interpohtiue A/D circuits’, in that it requires no internal D/A converter, nor does it produce a coarser quantization with larger inputs. A delta-sigma-modulator front end, used elsewhere in disCrete2, bipolar3 and passive grounded-capacitor MO!? circuitry, has been realized with a parasitic-insensitive switchedcapacitor integrator; Figure 1. The parasitic insensitivity allows