Non-scan testability based on fault-oriented conflict analysis
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Test generation for highly s equential circuits is quite complex so sequential circuits must be designed for testability to obtain good fault coverage and reduce test generation costs. A ne w testability measure based on the conflict analysis of hard-to-detect faults in the test generation process was used to develop a two-stage non-scan design for testability method. The new testability measure emulates most general featu res of sequential automatic test pattern generation (ATPG). The method was run o n a number of ISCAS benchmarks. The test results show that the proposed method p rovides better fault coverage and test efficiency than two recent non-scan desi gns for testability methods.