This work aims to the analysis of high-voltage (HV) SiC MOSFETs’ reliability and robustness. Large-area (up to 25 mm<sup>2</sup>) devices rated for 1.7-, 3.3-, and 4.5-kV applications were fabricated with a special process for gate oxide formation aimed to improve channel mobility. This treatment consists of the incorporation of boron atoms into the SiO<sub>2</sub>/SiC interface. The unit cell was designed to achieve a good short-circuit performance. As voltage rating increases, the reliability and robustness of power devices are crucial. Nevertheless, the procedures to test and characterize wide bandgap (WBG) power devices are still not standardized. In this work, the <inline-formula> <tex-math notation="LaTeX">$V_{\mathrm {th}}$ </tex-math></inline-formula> drift was evaluated at room temperature and at high temperature using a gate stress test specific for SiC devices. Switching at high bus voltage, short-circuit and power cycling were considered as reliability tests. Test results put in evidence that fabricated devices show reasonably good robustness but suffer from a significant <inline-formula> <tex-math notation="LaTeX">$V_{\mathrm {th}}$ </tex-math></inline-formula> drift caused by the boron process added to the gate oxide formation.