Securing Emerging Nonvolatile Main Memory With Fast and Energy-Efficient AES In-Memory Implementation
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Yuan Xie | Jingtong Hu | Shuangchen Li | Mimi Xie | Alvin Oliver Glova | Shuangchen Li | Yuan Xie | J. Hu | Mimi Xie | A. O. Glova
[1] Alec Wolman,et al. Protecting Data on Smartphones and Tablets from Memory Attacks , 2015, ASPLOS.
[2] Wei Zhang,et al. A racetrack memory based in-memory booth multiplier for cryptography application , 2016, 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC).
[3] Sanu Mathew,et al. 53Gbps native GF(24)2 composite-field AES-encrypt/decrypt accelerator for content-protection in 45nm high-performance microprocessors , 2010, 2010 Symposium on VLSI Circuits.
[4] Panu Hämäläinen,et al. Design and Implementation of Low-Area and Low-Power AES Encryption Hardware Core , 2006, 9th EUROMICRO Conference on Digital System Design (DSD'06).
[5] Ariel J. Feldman,et al. Lest we remember: cold-boot attacks on encryption keys , 2008, CACM.
[6] Onur Mutlu,et al. A case for exploiting subarray-level parallelism (SALP) in DRAM , 2012, 2012 39th Annual International Symposium on Computer Architecture (ISCA).
[7] Elaine B. Barker,et al. Guideline for Using Cryptographic Standards in the Federal Government: Directives, Mandates and Policies , 2016 .
[8] Yan Solihin,et al. Silent Shredder: Zero-Cost Shredding for Secure Non-Volatile Main Memory Controllers , 2016, ASPLOS.
[9] Eric Rotenberg,et al. Retention-aware placement in DRAM (RAPID): software methods for quasi-non-volatile DRAM , 2006, The Twelfth International Symposium on High-Performance Computer Architecture, 2006..
[10] D. McGrew,et al. The Galois/Counter Mode of Operation (GCM) , 2005 .
[11] Xian Zhang,et al. Pin Tumbler Lock: A shift based encryption mechanism for racetrack memory , 2016, 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC).
[12] Ingrid Verbauwhede,et al. PUFKY: A Fully Functional PUF-Based Cryptographic Key Generator , 2012, CHES.
[13] Kartik Mohanram,et al. SECRET: Smartly EnCRypted Energy efficienT non-volatile memories , 2016, 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC).
[14] Shimeng Yu,et al. Metal–Oxide RRAM , 2012, Proceedings of the IEEE.
[15] Yang Li,et al. An energy-efficient encryption mechanism for NVM-based main memory in mobile systems , 2017, J. Syst. Archit..
[16] Stephen Taylor,et al. Memory encryption , 2014, ACM Comput. Surv..
[17] Sanu Mathew,et al. 53 Gbps Native ${\rm GF}(2 ^{4}) ^{2}$ Composite-Field AES-Encrypt/Decrypt Accelerator for Content-Protection in 45 nm High-Performance Microprocessors , 2011, IEEE Journal of Solid-State Circuits.
[18] D. Ielmini,et al. Analytical Modeling of Chalcogenide Crystallization for PCM Data-Retention Extrapolation , 2007, IEEE Transactions on Electron Devices.
[19] Jung Ho Ahn,et al. CACTI-3DD: Architecture-level modeling for 3D die-stacked DRAM main memory , 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[20] Shaahin Angizi,et al. In-Memory Computing with Spintronic Devices , 2017, 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).
[21] Chip-Hong Chang,et al. DW-AES: A Domain-Wall Nanowire-Based AES for High Throughput and Energy-Efficient Data Encryption in Non-Volatile Memory , 2016, IEEE Transactions on Information Forensics and Security.
[22] Moinuddin K. Qureshi,et al. DEUCE: Write-Efficient Encryption for Non-Volatile Memories , 2015, ASPLOS.
[23] Cong Xu,et al. Pinatubo: A processing-in-memory architecture for bulk bitwise operations in emerging non-volatile memories , 2016, 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC).
[24] Karin Strauss,et al. Preventing PCM banks from seizing too much power , 2011, 2011 44th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).
[25] Cong Xu,et al. NVSim: A Circuit-Level Performance, Energy, and Area Model for Emerging Nonvolatile Memory , 2012, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[26] Yan Solihin,et al. i-NVMM: A secure non-volatile main memory system with incremental encryption , 2011, 2011 38th Annual International Symposium on Computer Architecture (ISCA).
[27] Nader Bagherzadeh,et al. Design and Evaluation of a Spintronic In-Memory Processing Platform for Nonvolatile Data Encryption , 2018, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[28] David Blaauw,et al. Recryptor: A reconfigurable in-memory cryptographic Cortex-M0 processor for IoT , 2017, 2017 Symposium on VLSI Circuits.
[29] Yoshihiro Ueda,et al. A 64Mb MRAM with clamped-reference and adequate-reference schemes , 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).
[30] Dan Feng,et al. A wear-leveling-aware counter mode for data encryption in non-volatile memories , 2017, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017.
[31] Tao Zhang,et al. An efficient run-time encryption scheme for non-volatile main memory , 2013, 2013 International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES).
[32] Pete Chown,et al. Advanced Encryption Standard (AES) Ciphersuites for Transport Layer Security (TLS) , 2002, RFC.