A Novel Valley-Fill SEPIC-Derived Power Supply Without Electrolytic Capacitor for LED Lighting Application

The high-brightness white-light-emitting diode (LED) has attracted a lot of attention for its high efficacy, simple to drive, environmentally friendly, long lifespan, and compact size. The power supply for LED also requires long life, while maintaining high efficiency, high power factor, and low cost. However, a typical power supply design employs an electrolytic capacitor as the storage capacitor, which is not only bulky, but also with a short lifespan, thus hampering performance improvement of the entire LED lighting system. In this paper, a novel power factor correction (PFC) topology is proposed by inserting the valley-fill circuit in the single-ended primary inductance converter (SEPIC)-derived converter, which can reduce the voltage stress of the storage capacitor and output diode under the same power factor condition. This valley-fill SEPIC-derived topology is, then, proposed for LED lighting applications. By allowing a relatively large voltage ripple in the PFC design and operating in the discontinuous conduction mode (DCM), the proposed PFC topology is able to eliminate the electrolytic capacitor, while maintaining high power factor and high efficiency. Under the electrolytic capacitor-less condition, the proposed PFC circuit can reduce the capacitance of the storage capacitor to half for the same power factor and output voltage ripple as comparing to its original circuit. To further increase the efficiency of LED driver proposal, a twin-bus buck converter is introduced and employed as the second-stage current regulator with the PWM dimming function. The basic operating principle and analysis will be described in detail. A 50-W prototype has been built and tested in the laboratory, and the experimental results under universal input-voltage operation are presented to verify the effectiveness and advantages of the proposal.

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