A FAULT-TOLERANT DIGITAL CLOCKING SYSTEM

A clocking system is described that uses an a r r a y of identical oscil lator modules to produce a number of phase-locked clock signals. Using 3 f i l modules. phase-locking is maintained on at least 2f+l of the signals after f fai lures. Local conditioning circuits convert the 3f+l clock signals into local clock signals that a r e phase-locked if no m o r e than f failures occur. A model has beenconstructed and tested. This system can provide reliable synchronization for systems that use comparison or voting to achieve fault tolerance.