N-Well Engineering to Improve Soft-Error-Rate Immunity for P-Type Substrate SRAM Technologies

We present experimental as well as simulation data which emphasizes the impact of the well and substrate architecture for the charge collection efficiency during an alpha particle hit. Several different SRAM cores with implanted buried layer, epitaxial grown and standard CZ substrates are subjected to alpha-particle events and the soft error rate is recorded. The best SER immunity was achieved with the standard CZ substrate. This findings are contradictive to earlier reports for DRAM memory cores and will be explained in detail within this paper. Resulting from this analysis we optimize the substrate to improve the SER immunity of SRAM cores.