Special Purpose Hardware for Discrete Fourier Transform Implementation

Abstract Parallel hardware implementation of a ‘pre-addition’ matrix for the first step of a Fourier transform on n points where n is the product of either two or three discrete primes is described. A set of adders with a small amount of temporary memory is required; input and output is by a common bus. The individual microprograms for each processor are described. Detailed pipeline timings are given showing a nearly perfect hardware utilization. The examples of 35 and 105 point transforms are followed in detail.