A high-speed 7 bit A/D converter
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A 7 bit two-step parallel A/D converter has been designed using a new quantizer-subtractor circuit. The small delay in the new circuit allows digital signal sampling by latching comparators. A sample and hold unit is not needed which results in a fully integrable A/D function. Analog input signals up to 5 MHz can be digitally sampled with sampling frequencies up to 50 MHz. A double layer metallization process is used to reduce the die size to 2.4/spl times/2.5 mm.
[1] J. Peterson. A monolithic, fully parallel, 8b A/D converter , 1979, 1979 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
[2] R. Nordstrom. High speed integrated A/D converter , 1976, 1976 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.