10 GHz low phase noise fully integrated VCOs in 130 nm high resistivity CMOS/SOI for 40 Gbits/s datacom

This paper discusses the 10 GHz low phase noise fully integrated VCOs in 130 nm high resistivity CMOS/SOI for 40 Gbits/s datacom. This work is a first step towards the evaluation of SOI technology for 40 Gbit/s applications. In particular, CMOS/SOI technologies allow the design of high speed, high performance VCOs and key blocks for high data rate designs. Useful advantages over bulk processes (especially with high resistivity SOI substrates) include high-Q passives, as well as better substrate insulation. Several architectures for a differential VCO, destined to be part of a four phase LC ring VCO, were designed in order to analyze the influence of passives and filtering techniques on phase noise.

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