An IP-Based On-Chip Packet-Switched Network
暂无分享,去创建一个
[1] Alain Greiner,et al. A generic architecture for on-chip packet-switched interconnections , 2000, DATE '00.
[2] T. Hamalainen,et al. Overview of bus-based system-on-chip interconnections , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).
[3] Ahmed Amine Jerraya,et al. Mixed-level cosimulation for fine gradual refinement of communication in SoC design , 2001, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001.
[4] Alberto L. Sangiovanni-Vincentelli,et al. Interface-based design , 1997, DAC.
[5] M. Birnbaum,et al. How VSIA Answers the SOC Dilemma , 1999, Computer.
[6] Peter Judge. Open Systems: The Guide to Osi and Its Implementation , 1989 .
[7] William J. Dally,et al. Route packets, not wires: on-chip inteconnection networks , 2001, DAC '01.
[8] Grant Martin,et al. Surviving the SOC Revolution: A Guide to Platform-Based Design , 1999 .
[9] Li-Shiuan Peh,et al. Flow control and micro-architectural mechanisms for extending the performance of interconnection networks , 2001 .
[10] Axel Jantsch,et al. Network on Chip : An architecture for billion transistor era , 2000 .
[11] Alberto L. Sangiovanni-Vincentelli,et al. System design: traditional concepts and new paradigms , 1999, Proceedings 1999 IEEE International Conference on Computer Design: VLSI in Computers and Processors (Cat. No.99CB37040).
[12] Wolfgang Fichtner,et al. Globally-asynchronous locally-synchronous architectures to simplify the design of on-chip systems , 1999, Twelfth Annual IEEE International ASIC/SOC Conference (Cat. No.99TH8454).