A novel design layout of three disjoint paths multistage interconnection network & its reliability analysis

Purpose The purpose of this paper is to design a efficient layout of Multistage interconnection network which has cost effective solution with high reliability and fault-tolerence capability. For parallel computation, various multistage interconnection networks (MINs) have been discussed hitherto in the literature, however, these networks always required further improvement in reliability and fault-tolerance capability. The fault-tolerance capability of the network can be achieved by increasing the number of disjoint paths as a result the reliability of the interconnection networks is also improved. Design/methodology/approach This proposed design is a modification of gamma interconnection network (GIN) and three disjoint path gamma interconnection network (3-DGIN). It has a total seven number of paths for all tag values which is uniform out of these seven paths, three paths are disjoint paths which increase the fault tolerance capability by two faults. Due to the presence of more paths than the GIN and 3-DGIN, this proposed design is more reliable. Findings In this study, a new design layout of a MIN has been proposed which provides three disjoint paths and uniformity in terms of an equal number of paths for all source-destination (S-D) pairs. The new layout contains fewer nodes as compared to GIN and 3-DGIN. This design provides a symmetrical structure, low cost, better terminal reliability and provides an equal number of paths for all tag values (|S-D|) when compared with existing MINs of this class. Originality/value A new design layout of MINs has been purposed and its two terminal reliability is calculated with the help of the reliability block diagram technique.

[1]  Rajesh Mishra,et al.  4DGIN-3: A new design layout of 4-disjoint gamma interconnection network , 2016, J. Parallel Distributed Comput..

[2]  Mohamed Othman,et al.  Reliability Review of Interconnection Networks , 2016 .

[3]  Indra Gunawan,et al.  Reliability prediction of distributed systems using Monte Carlo method , 2013 .

[4]  Indra Gunawan,et al.  Redundant paths and reliability bounds in gamma networks , 2008 .

[5]  Howard Jay Siegel,et al.  The Extra Stage Cube: A Fault-Tolerant Interconnection Network for Supersystems , 1982, IEEE Transactions on Computers.

[6]  Tse-yun Feng,et al.  A Survey of Interconnection Networks , 1981, Computer.

[7]  Mohsen Jahanshahi,et al.  A new approach to improve reliability of the multistage interconnection networks , 2014, Comput. Electr. Eng..

[8]  Po-Jen Chuang CGIN: A Fault Tolerant Modified Gamma Interconnection Network , 1996, IEEE Trans. Parallel Distributed Syst..

[9]  Rajesh Mishra,et al.  Design of Fault Tolerant Shuffle Exchange Gamma Interconnection Network Layouts , 2017, J. Interconnect. Networks.

[10]  S. Rajkumar,et al.  Review of Multistage Interconnection Networks Reliability and Fault-Tolerance , 2016 .

[11]  K. Misra,et al.  AN EFFICIENT MULTI-VARIABLE INVERSION ALGORITHM FOR RELIABILITY EVALUATION OF COMPLEX SYSTEMS USING PATH SETS , 2002 .

[12]  Chung-Ping Chung,et al.  3-Disjoint gamma interconnection networks , 2003, J. Syst. Softw..

[13]  Mohsen Jahanshahi,et al.  Improved extra group network: a new fault-tolerant multistage interconnection network , 2014, The Journal of Supercomputing.

[14]  Kai Hwang,et al.  Computer architecture and parallel processing , 1984, McGraw-Hill Series in computer organization and architecture.

[15]  Indra Gunawan,et al.  Reliability analysis of shuffle-exchange network systems , 2008, Reliab. Eng. Syst. Saf..

[16]  Cauligi S. Raghavendra,et al.  The Gamma Network , 1984, IEEE Transactions on Computers.

[17]  Lionel M. Ni,et al.  Issues in designing truly scalable interconnection networks , 1996, 1996 Proceedings ICPP Workshop on Challenges for Parallel Processing.

[18]  Ranjan Kumar Dash,et al.  Bounds on Reliability of Parallel Computer Interconnection Systems , 2009 .

[19]  Jehoshua Bruck,et al.  Tolerating Multiple Faults in Multistage Interconnection Networks with Minimal Extra Stages , 2000, IEEE Trans. Computers.

[20]  Ching-Wen Chen,et al.  A minimal links traversed dynamic rerouting network , 2004, Parallel Comput..

[21]  Kishor S. Trivedi,et al.  Multistage Interconnection Network Reliability , 1989, IEEE Trans. Computers.

[22]  Mohamed Othman,et al.  Reliability Evaluation for Shuffle Exchange Interconnection Network , 2015 .