A scalable architecture for volume rendering

Abstract We describe the operational principles of a scalable hardware accelerator for volume rendering. The basic philosophy is to provide an atomic unit which already provides sophisticated volume graphics at interactive rendering speed. Realtime speed can then be achieved by operating multiple units in parallel. The basic unit consists of just four VLSI chips and the volume memory and thus meets the requirements of a small size and low costs. Nevertheless, it provides arbitrary perspective projections (e.g. for walk-throughs), Phong shading, a freely moveable light source, depth-cueing and interactive, non-binary classification (semi-transparent display) at a frame rate of about 2.5 Hz for 2563 data sets.