The Rise of Serial Memory and the Future of DDR

With no plans emerging to define a “DDR5” specification, it is certainly clear that the entire memory landscape is going to change profoundly over the coming years. The current DDR4 generation (including the mobile-focused LPDDR4 low-power model) continues to ramp up slowly, but it is essentially the last of its kind, the ultimate generation of memory technology based on the DDR model. LPDDR is being well-accepted in the wireless devices market, but with wireless technology evolving through a generation (or sometimes two) every year, the LPDDR model simply will not be able to keep up. As they become competitively viable, multiple memory technologies are already vying for dominance of this chunk of the memory market space. The current DDR market is expected to be split, and eventually taken over, by new serial memory technologies, like Hybrid Memory Cube (HMC) and other schemes still in the development pipeline. Programmable logic devices like FPGAs and SOCs must maintain support for these new memory schemes as they emerge into the marketplace. This white paper explains why the DDR model is now approaching the end of its useful lifetime, and how serial memory schemes can be expected to fill the memory needs of the future. Xilinx UltraScale devices and platforms have been engineered from the outset with the future in mind, providing a seamless transition to the newly emerging serial memory technologies.