An 8×8 nRERL serial multiplier for ultra-low-power aplications

The test chip was fabricated with the help of IDEC program of KAIST, Taejon, Korea. This paper was sup- ported by NON DIRECTED RESEARCH FUND, Korea Research Foundation,throught Inter-university Semicon- ductor Research Center, Seoul National University, Seoul, Korea, from 1996 to 1999.