A fully integrated low-power complementary metal-oxide-semiconductor (CMOS) particle detector front-end (PDFE), optimized for space applications, is presented. The front-end comprises a charge sensitive amplifier and a four-stage semi-Gaussian pulse-shaping amplifier. The chip was custom synthesized with an analog synthesis environment. With a power consumption of only 10 mW and a chip area less than 1 mm/sup 2/, the chip is very well suited for the stringent demands in space applications. Measurements show a peaking time of 1.2 /spl mu/s and a total equivalent noise charge of less than 1000 e/sub rms//sup -/. Although a standard 0.7-/spl mu/m CMOS was used, little performance degradation was observed after exposure to a total dose irradiation of 50 kRad. All tested chips fully recovered within specifications, after 24 h of annealing at room temperature.
[1]
Georges G. E. Gielen,et al.
Hierarchical top-down design of analog sensor interfaces: from system-level specifications down to silicon
,
1998,
Proceedings Design, Automation and Test in Europe.
[2]
Georges G. E. Gielen,et al.
An analogue module generator for mixed analogue/digital asic design
,
1995,
Int. J. Circuit Theory Appl..
[3]
Peter R. Kinget,et al.
Full integration of extremely large time constants in CMOS
,
1991
.
[4]
S. Panebianco,et al.
A four-channel, low-power CMOS charge preamplifier for silicon detectors with medium value of capacitance
,
1997
.
[5]
Georges Gielen,et al.
A performance-driven placement tool for analog integrated circuits
,
1995
.