Polling Watchdog: Combining Polling and Interrupts for Efficient Message Handling

Parallel systems supporting multithreading, or message passing in general, have typically used either polling or interrupts to handle incoming messages. Neither approach is ideal; either may lead to excessive overheads or message-handling latencies, depending on the application. This paper investigates a combined approach---Polling Watchdog, where both are used depending on the circumstances. The Polling Watchdog is a simple hardware extension that limits the generation of interrupts to the cases where explicit polling fails to handle the message quickly. As an added benefit, this mechanism also has the potential to simplify the interaction between interrupts and the network accesses performed by the program.We present the resulting performance for the EARTH-MANNA-S system, an implementation of the EARTH (Efficient Architecture for Running THreads) execution model on the MANNA multiprocessor. In contrast to the original EARTH-MANNA system, this system does not use a dedicated communication processor. Rather, synchronization and communication tasks are performed on the same processor as the regular computations. Therefore, an efficient message-handling mechanism is essential to good performance. Simulation results and performance measurements show that the Polling Watchdog indeed performs better than either polling or interrupts alone. In fact, this mechanism allows the EARTH-MANNA-S system to achieve the same level of performance as the original EARTH-MANNA multithreaded system.

[1]  Guang R. Gao,et al.  Costs and Benefits of Multithreading with Off-the-Shelf RISC Processors , 1995, Euro-Par.

[2]  Dana S. Henry,et al.  A tightly-coupled processor-network interface , 1992, ASPLOS V.

[3]  Wolfgang K. Giloi,et al.  Latency hiding in message-passing architectures , 1994, Proceedings of 8th International Parallel Processing Symposium.

[4]  Michael D. Noakes,et al.  The J-machine multicomputer: an architectural evaluation , 1993, ISCA '93.

[5]  William J. Dally,et al.  Evaluating the locality benefits of active messages , 1995, PPOPP '95.

[6]  Seth Copen Goldstein,et al.  Evaluation of mechanisms for fine-grained parallel programs in the J-machine and the CM-5 , 1993, ISCA '93.

[7]  Mitsuhisa Sato,et al.  The EM-X parallel computer: architecture and basic performance , 1995, ISCA.

[8]  Seth Copen Goldstein,et al.  Active messages: a mechanism for integrating communication and computation , 1998, ISCA '98.

[9]  Guang R. Gao,et al.  Building multithreaded architectures with off-the-shelf microprocessors , 1994, Proceedings of 8th International Parallel Processing Symposium.

[10]  James C. Hoe,et al.  START-NG: Delivering Seamless Parallel Computing , 1995, Euro-Par.

[11]  Donald Yeung,et al.  The MIT Alewife machine: architecture and performance , 1995, ISCA '98.

[12]  Guang R. Gao,et al.  A design study of the EARTH multiprocessor , 1995, PACT.

[13]  Guang R. Gao,et al.  Multithreaded Architectures: Principles, Projects, and Issues , 1994, Multithreaded Computer Architecture.

[14]  Xinmin Tian,et al.  The Multi-Threaded Architecture Multiprocessor , 1994 .

[15]  Seth Copen Goldstein,et al.  Evaluation Of Mechanisms For Fine-grained Parallel Programs In The J-machine And The Cm-5 , 1993, Proceedings of the 20th Annual International Symposium on Computer Architecture.

[16]  Seth Copen Goldstein,et al.  TAM - A Compiler Controlled Threaded Abstract Machine , 1993, J. Parallel Distributed Comput..

[17]  Mitsuhisa Sato,et al.  Super-threading: architectural and software mechanisms for optimizing parallel computation , 1993, ICS '93.

[18]  Eric A. Brewer,et al.  Remote queues: exposing message queues for optimization and atomicity , 1995, SPAA '95.

[19]  Seth Copen Goldstein,et al.  Active messages: a mechanism for integrating communication and computation , 1998, ISCA '98.

[20]  H. Yamana,et al.  The EM-X parallel computer: architecture and basic performance , 1995, Proceedings 22nd Annual International Symposium on Computer Architecture.

[21]  Brian N. Bershad,et al.  Fast Interrupt Priority Management in Operating System Kernels , 1993, USENIX Microkernels and Other Kernel Architectures Symposium.

[22]  Andrew S. Tanenbaum,et al.  Operating systems: design and implementation , 1987, Prentice-Hall software series.