论文信息 - A precision CMOS amplifier using floating-gates for offset cancellation

A precision CMOS amplifier using floating-gates for offset cancellation

A long-term offset cancellation scheme that enables continuous-time amplifier operation is described. Offset cancellation is achieved by programming floating-gate transistors that form an integral part of the amplifier's architecture. The offset voltage of a single-stage folded cascode amplifier is reduced to plusmn25 muW in a 0.5mum digital CMOS process. The offset voltage drift is 0.5 muV over a period of 10 years at 25degC and varies by a maximum of 130muV over a temperature range of 170degC

[1] Gabor C. Temes,et al. Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization , 1996, Proc. IEEE.

[2] Paul Hasler,et al. Offset removal using floating-gate circuits for mixed-signal systems , 2003, Southwest Symposium on Mixed-Signal Design, 2003..

[3] H. Melchior,et al. A four-state EEPROM using floating-gate memory cells , 1987 .

[4] Tyson S. Hall,et al. Automatic rapid programming of large arrays of floating-gate elements , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

[5] Susumu Kohyama,et al. A Thermionic Electron Emission Model for Charge Retention in SAMOS Structure , 1982 .

[6] W. Guggenbuhl,et al. An analog trimming circuit based on a floating-gate device , 1988 .

[7] Takashi Morie,et al. A PWM analog memory programming circuit for floating-gate MOSFETs with 75-μs programming time and 11-bit updating resolution , 2001, IEEE J. Solid State Circuits.

[8] I. E. Opris,et al. A rail-to-rail ping-pong op-amp , 1996, IEEE J. Solid State Circuits.

[9] L. Carley,et al. Trimming analog circuits using floating-gate analog MOS memory , 1989, IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers.

[10] Gordon W. Roberts,et al. An Introduction to Mixed-Signal IC Test and Measurement , 2000 .