Method for compressing wiring layout data volume with high rate

With the vigorous development of digital multimedia and liquid crystal display technology, flat panel displays are widely applied in more and more fields. In the design process of some large-dimension display panels, and high equivalent resistance characteristic is required for wiring connection between liquid crystal arrays and IC panels in order to pursue high display quality. Mainstream panel design software tools generally adjust the wiring resistance by adding repeated winding units with the same dimension in the wiring, but this method always makes layout files generated by the software too large since a lot of redundant points are added in the wiring, and data storage and transfer are not facilitated. The invention provides a method for compressing the wiring layout data volume with high rate. Repeated winding units are fabricated to one cell, the repeated winding units in the wiring are generated by employing a cell array manner. According to the method, the generated wiring layout data volume can be compressed to about 10% of the data volume of the conventional wiring.