The effect of the number of defect mechanisms on fault clustering and its detection using yield model parameters

The superposition principle is used to analyze faults of different mechanisms. The sum of the individual cluster coefficients of each mechanism is approximately equal to the cluster coefficient for all mechanisms combined. This technique is used on defect density test structures as well as bit failures from SRAM chips. A regression analysis of empirical data is used to demonstrate this concept for the defect density test chips. The actual and, the model fault densities are compared and show excellent agreement. As a comparative analysis, a quadrant technique was used to compile a frequency distribution of electrical faults and a nonlinear least-squares technique is applied to the distribution to estimate the parameters in the gamma and Poisson distributions. These results are compared to the cluster parameters from the summation technique and the technique using moment estimates. All three estimates are in very good agreement. The application of this model to actual chip yields is shown not only to be more accurate but also to contain information about the relative number of fault generating mechanisms for the mask level of interest in the process. >

[1]  Peter J. Diggle,et al.  Statistical analysis of spatial point patterns , 1983 .

[2]  Virginia F. Flack Introducing dependency into IC yield models , 1985 .

[3]  P. Gangatirkar,et al.  Test/characterization procedures for high density silicon RAMs , 1982, 1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[4]  J. E. Price,et al.  A new look at yield of integrated circuits , 1970 .

[5]  C.H. Stapper,et al.  Integrated circuit yield statistics , 1983, Proceedings of the IEEE.

[6]  R. B. Seeds,et al.  Yield and cost analysis of bipolar LSI , 1968 .

[7]  Keith Ord,et al.  Statistical analysis of spatial dispersion , 1974 .

[8]  C. Stapper The effects of wafer to wafer defect density variations on integrated circuit defect and fault distributions , 1985 .

[9]  Charles H. Stapper,et al.  Modeling of Integrated Circuit Defect Sensitivities , 1983, IBM J. Res. Dev..

[10]  C. H. Stapper,et al.  On yield, fault distributions, and clustering of particles , 1986 .

[11]  C. Stapper Correlation analysis of particle clusters on integrated circuit wafers , 1987 .

[12]  S. Gandemer,et al.  Critical area and critical levels calculation in IC yield modeling , 1988 .

[13]  B. T. Murphy,et al.  Cost-size optima of monolithic integrated circuits , 1964 .

[14]  J. A. Cunningham The use and evaluation of yield models in integrated circuit manufacturing , 1990 .

[15]  C. Kooperberg,et al.  Circuit layout and yield , 1988 .

[16]  Charles H. Stapper Simulation of spatial fault distributions for integrated circuit yield estimations , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[17]  Charles H. Stapper Statistics associated with spatial fault simulation used for evaluating integrated circuit yield enhancement , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[18]  Charles H. Stapper,et al.  Large-Area Fault Clusters and Fault Tolerance in VLSI Circuits: A Review , 1989, IBM J. Res. Dev..