Measurement and characterization of hot carrier safe operating area (HCI-SOA) in 24V n-type lateral DMOS transistors

Due to strong demand on smart-power technologies, LDMOS device has been widely used because of its compatibility with standard CMOS process. For most fabrication companies, this is an attractive reason to extend the existing technology applications. However, the device is vulnerable to hot carrier (HCI) damage. SOA in HCI is one of the major criteria to address the concern in LDMOS device design. There are a lot of reliability studies focusing on the HCI failure mechanism but not many literatures available on SOA characterization. This paper will focus on the HCI-SOA test methodology and characterization for n-type LDMOS device by adopting the conventional CMOS HCI test method. This will be a useful guideline for the industry on the device characterization process.

[1]  M. Bourcerie,et al.  Comments on "The generation and characterization of electron and hole traps created by hole injection during low gate voltage hot-carrier stressing of n-MOS transistors" [with reply] , 1990 .

[2]  C.M. Liu,et al.  Mechanism and Improvement of On-Resistance Degradation Induced by Avalanche Breakdown in Lateral DMOS Transistors , 2008, IEEE Transactions on Electron Devices.

[3]  B. Riccò,et al.  Hot-carrier reliability in submicrometer LDMOS transistors , 1997, International Electron Devices Meeting. IEDM Technical Digest.

[4]  Werner Kanert,et al.  Reliability challenges for power devices under active cycling , 2009, 2009 IEEE International Reliability Physics Symposium.

[5]  R. Versari,et al.  Experimental study of hot-carrier effects in LDMOS transistors , 1999 .

[6]  Philip L. Hower Safe operating area - a new frontier in Ldmos design , 2002, Proceedings of the 14th International Symposium on Power Semiconductor Devices and Ics.

[7]  A. Boudou,et al.  Interface state creation and charge trapping in the medium-to-high gate voltage range (V/sub d//2>or=V/sub g/, 1990 .

[8]  Prasad Chaparala,et al.  Hot carrier reliability of N-LDMOS transistor arrays for power BiCMOS applications , 2002, 2002 IEEE International Reliability Physics Symposium. Proceedings. 40th Annual (Cat. No.02CH37320).

[9]  P.L. Hower,et al.  Short and long-term safe operating area considerations in LDMOS transistors , 2005, 2005 IEEE International Reliability Physics Symposium, 2005. Proceedings. 43rd Annual..

[10]  E. Takeda,et al.  An empirical model for device degradation due to hot-carrier injection , 1983, IEEE Electron Device Letters.

[11]  Eiji Takeda,et al.  Hot-Carrier Effects in MOS Devices , 1995 .

[12]  P. Heremans,et al.  Hot-carrier effects in n-channel MOS transistors under alternating stress conditions , 1988, IEEE Electron Device Letters.

[13]  V. O'Donovan,et al.  Hot carrier reliability of lateral DMOS transistors , 2000, 2000 IEEE International Reliability Physics Symposium Proceedings. 38th Annual (Cat. No.00CH37059).

[14]  Y. Tsividis Operation and modeling of the MOS transistor , 1987 .