Multiplicative finite impulse response filters: implementations and applications using field programmable gate arrays

This paper describes how modern field programmable gate array (FPGA) technology can be used to build practical and efficient multiplicative finite impulse response (MFIR) filters with low-pass, high-pass, band-pass and band-stop characteristics. This paper explains how MFIR structures can be built with or without linear phase characteristics and implemented efficiently on modern FPGA architectures using fixed-point arithmetic without incurring stability problems or limit cycles which commonly occur when using equivalent infinite impulse response structures. These properties have a particular importance for applications such as tunable resonators, narrow band rejectors and linear phase filters which have demanding, narrow transition band requirements. The results presented in this paper indicate that MFIR filters are, for some applications, a viable alternative to existing filter structures when implemented on an FPGA.

[1]  Ying Wei,et al.  Improved Design of Frequency-Response Masking Filters Using Band-Edge Shaping Filter With Non-Periodical Frequency Response , 2013, IEEE Transactions on Signal Processing.

[2]  Arnab K. Shaw,et al.  A general Look-Ahead algorithm for pipelining IIR filters , 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

[3]  Paul M. Chau,et al.  A technique for realizing linear phase IIR filters , 1991, IEEE Trans. Signal Process..

[4]  Keshab K. Parhi,et al.  Pipeline interleaving and parallelism in recursive digital filters. I. Pipelining using scattered look-ahead and decomposition , 1989, IEEE Trans. Acoust. Speech Signal Process..

[5]  Jean-Jacques Vandenbussche,et al.  Linear phase approximation of real and complex pole IIR filters using MFIR structures , 2012 .

[6]  Bede Liu,et al.  Pipelined recursive filter with minimum order augmentation , 1992, IEEE Trans. Signal Process..

[7]  Tapio Saramäki,et al.  Optimization of FIR filters using the frequency-response masking approach , 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

[8]  Keshab K. Parhi,et al.  Pipelined VLSI recursive filter architectures using scattered look-ahead and decomposition , 1988, ICASSP-88., International Conference on Acoustics, Speech, and Signal Processing.

[9]  Ravinder Kaur,et al.  Design and Implementation of High Speed IIR and FIR Filter using Pipelining , 2011 .

[10]  Tapio Saramäki,et al.  FRM-Based FIR Filters With Optimum Finite Word-Length Performance , 2007, IEEE Transactions on Signal Processing.

[11]  Aníbal Ferreira,et al.  An Accurate Method of Detection and Cancellation of Multiple Acoustic Feedbacks , 2005 .

[12]  Kenneth Steiglitz.  A Note on Constant-Gain Digital Resonators , 1994 .

[13]  L. Montgomery Smith,et al.  Decomposition of FIR digital filters for realization via the cascade connection of subfilters , 1998, IEEE Trans. Signal Process..

[14]  Bede Liu,et al.  Design of cascade form FIR filters with discrete valued coefficients , 1988, IEEE Trans. Acoust. Speech Signal Process..

[15]  Adly T. Fam.  MFIR filters: Properties and applications , 1981 .

[16]  Dong Shi,et al.  Design of Discrete-Valued Linear Phase FIR Filters in Cascade Form , 2011, IEEE Transactions on Circuits and Systems I: Regular Papers.

[17]  Y. C. Lim.  A new approach for deriving scattered coefficients of pipelined IIR filters , 1995, IEEE Trans. Signal Process..

[18]  Yong Ching Lim,et al.  Frequency-response masking approach for the synthesis of sharp linear phase digital filters , 1986 .

[19]  An-Yeu Wu,et al.  A universal look-ahead algorithm for pipelining IIR filters , 2008, 2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT).

[20]  Mrityunjoy Chakraborty,et al.  FPGA based implementation of high speed tunable notch filter using pipelining and unfolding , 2014, 2014 Twentieth National Conference on Communications (NCC).

[21]  Joan Peuteman,et al.  An FPGA based Digital Lock-In Amplifier Implemented using MFIR Resonators , 2012 .

[22]  H. H. Loomis,et al.  New approach to clustered look-ahead pipelined IIR digital filters , 1995 .

[23]  Jean-Jacques Vandenbussche,et al.  Analysis of Time and Frequency Domain Performance of MFIR Filters , 2008, ESA.

[24]  Håkan Johansson,et al.  Add-Equalize Structures for Linear-Phase Nyquist FIR Filter Interpolators and Decimators , 2014, IEEE Transactions on Circuits and Systems I: Regular Papers.

[25]  L. Montgomery Smith,et al.  Roundoff noise reduction in cascade realizations of FIR digital filters , 2000, IEEE Trans. Signal Process..

[26]  KyungHi Chang,et al.  Pipelined recursive digital filters: clustered look-ahead and scattered look-ahead techniques , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.