A-TEAM: Automatic template-based assertion miner

Different mining approaches have been proposed in literature for the automatic generation of temporal assertions from execution traces of digital systems. However, in most cases, existing tools can only mine assertions compliant with a limited set of pre-defined templates. Furthermore, they tend to generate a huge amount of assertions, while they still lack an effective way to measure their coverage in terms of design behaviours. To fill in the gap, this paper presents A-TEAM, a tool for the automatic extraction of temporal assertions starting from a set of user-defined assertion templates. Our method involves a combination of data mining and coverage analysis for mining a compact and expressive set of LTL formulas.

[1]  George S. Avrunin,et al.  Patterns in property specifications for finite-state verification , 1999, Proceedings of the 1999 International Conference on Software Engineering (IEEE Cat. No.99CB37002).

[2]  Franco Fummi,et al.  Properties Incompleteness Evaluation by Functional Verification , 2007, IEEE Transactions on Computers.

[3]  Sanjit A. Seshia,et al.  Scalable specification mining for verification and diagnosis , 2010, Design Automation Conference.

[4]  Ramakrishnan Srikant,et al.  Fast Algorithms for Mining Association Rules in Large Databases , 1994, VLDB.

[5]  Michael D. Ernst Static and dynamic analysis: synergy and duality , 2003 .

[6]  Graziano Pravadelli,et al.  Automatic Generation and Qualification of Assertions on Control Signals: A Time Window-Based Approach , 2015, VLSI-SoC.

[7]  Vijay V. Vazirani,et al.  Approximation Algorithms , 2001, Springer Berlin Heidelberg.

[8]  James R. Larus,et al.  Mining specifications , 2002, POPL '02.

[9]  Rakesh Agarwal,et al.  Fast Algorithms for Mining Association Rules , 1994, VLDB 1994.

[10]  Shobha Vasudevan,et al.  Automatic Generation of System Level Assertions from Transaction Level Models , 2013, J. Electron. Test..

[11]  Shobha Vasudevan,et al.  Mining Hardware Assertions With Guidance From Static Analysis , 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[12]  Graziano Pravadelli,et al.  Automatic extraction of assertions from execution traces of behavioural models , 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).