Offset cancellation for zero crossing based circuits

This work introduces a simple, background offset cancellation scheme for zero-crossing based circuits (ZCBC). The ZCBC architecture has been proposed as an alternative to op-amp based analog to digital converts (ADC) because it does not suffer from the gain, stability, and settling time trade off. However, offset remains as a challenge. This work demonstrates an input offset cancellation scheme that employs a replica circuit to measure and then subtract the offset. The cancellation method has been applied to an 8bit, 250 MHz pipelined ADC in 90nm.

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