A 14-bit MOS DAC is described that has current sources that are free from the non-linear current mismatch caused by ground-line voltage drop and output circuits that do not suffer from time-constant change at the output terminal when the input digital code changes. Base current sources are locally classified into two groups with two different values, and the unit current source is constructed by adding one base current source from one group and another base current source from the other group. Eight buffer amplifiers are distributed between the output terminal and current switches to stabilize the voltage at the node where several outputs of unit current sources are tied together and to eliminate the influence of stray capacitances associated with unit current sources and current switches. A 14-bit, 3.3-V DAC was fabricated using 0.35-um CMOS devices. The results show that the DNL and INL are from +0.7 to −0.75 LSB and +1.5 to −1 dB, respectively, and that the SFDR for 2.5-MHz and 10-MHz reconstructed signal waveforms were 77 dB and 67 dB, respectively, with a 50-MHz clock. The current consumption was 25 mA.
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