Design optimization of SiGe BiCMOS Silicon Controlled Rectifier for Charged Device Model (CDM) protection applications
暂无分享,去创建一个
Javier A. Salcedo | Jean-Jacques Hajjar | Yuanzhong Zhou | Juin J. Liou | Qiang Cui | Srivatsan Parthasarathy
[1] Chun-Yu Lin,et al. Low-Capacitance SCR With Waffle Layout Structure for On-Chip ESD Protection in RF ICs , 2007, IEEE Transactions on Microwave Theory and Techniques.
[2] Ming-Dou Ker,et al. ESD-Protection Design With Extra Low-Leakage-Current Diode String for RF Circuits in SiGe BiCMOS Process , 2006, IEEE Transactions on Device and Materials Reliability.
[3] M. Mergens,et al. Diode-triggered SCR (DTSCR) for RF-ESD protection of BiCMOS SiGe HBTs and CMOS ultra-thin gate oxides , 2003, IEEE International Electron Devices Meeting 2003.
[4] A. Amerasekera,et al. Bipolar SCR ESD protection circuit for high speed submicron bipolar/BiCMOS circuits , 1995, Proceedings of International Electron Devices Meeting.
[5] Haigang Feng,et al. A new low-parasitic polysilicon SCR ESD protection structure for RF ICs , 2005, IEEE Electron Device Letters.
[6] Vladislav A. Vashchenko,et al. Bipolar SCR ESD devices , 2005, Microelectron. Reliab..
[7] Ming-Dou Ker,et al. SCR device fabricated with dummy-gate structure to improve turn-on speed for effective ESD protection in CMOS technology , 2005 .
[8] V.A. Vashchenko,et al. New dual-direction ESD device in Si-Ge BiCMOS process , 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.
[9] O. Marichal,et al. Characterizing the transient device behavior of SCRs by means of VFTLP waveform analysis , 2007, 2007 29th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD).
[10] Juin J. Liou. Principles and Analysis of AlGaAs/GaAs Heterojunction Bipolar Transistors , 1996 .
[12] S. Parthasarathy,et al. Design of SCR devices for SiGe BiCMOS applications , 2011, 2011 IEEE Bipolar/BiCMOS Circuits and Technology Meeting.
[13] J.J. Liou,et al. TCAD Methodology for Design of SCR Devices for Electrostatic Discharge (ESD) Applications , 2007, IEEE Transactions on Electron Devices.
[14] G. Groeseneken,et al. Calibration of very fast TLP transients , 2009, 2009 31st EOS/ESD Symposium.
[15] B. Keppens,et al. Speed optimized diode-triggered SCR (DTSCR) for RF ESD protection of ultra-sensitive IC nodes in advanced technologies , 2005, IEEE Transactions on Device and Materials Reliability.
[16] H. Gossner,et al. Transient behavior of SCRS during ESD pulses , 2008, 2008 IEEE International Reliability Physics Symposium.
[17] Charles Chu,et al. Using VFTLP data to design for CDM robustness , 2009, 2009 31st EOS/ESD Symposium.
[18] Yan Han,et al. Analyse of Protection Devices' Speed Performance against ESD under CDM Using TCAD , 2007, 2007 IEEE Conference on Electron Devices and Solid-State Circuits.
[19] M. Haunschild,et al. Very-fast transmission line pulsing of integrated structures and the charged device model , 1996, 1996 Proceedings Electrical Overstress/Electrostatic Discharge Symposium.
[20] S. Voldman. ESD: Physics and Devices , 2004 .
[21] J.J. Liou,et al. Design and integration of novel SCR-based devices for ESD protection in CMOS/BiCMOS technologies , 2005, IEEE Transactions on Electron Devices.
[22] Junjun Li,et al. Investigation of voltage overshoots in diode triggered silicon controlled rectifiers (DTSCRs) under very fast transmission line pulsing (VFTLP) , 2009, 2009 31st EOS/ESD Symposium.
[23] S. Voldman. ESD : RF Technology and Circuits , 2006 .