Clustering-Based Topology Generation Approach for Application-Specific Network on Chip
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Xiaolin Qin | Fen Ge | Ning Wu | N YingZhang
[1] Alberto L. Sangiovanni-Vincentelli,et al. Efficient synthesis of networks on chip , 2003, Proceedings 21st International Conference on Computer Design.
[3] Wu,et al. Genetic Algorithm Based Mapping and Routing Approach for Network on Chip Architectures , 2010 .
[4] Suleyman Tosun,et al. TopGen: A new algorithm for automatic topology generation for Network on Chip architectures to reduce power consumption , 2009, 2009 International Conference on Application of Information and Communication Technologies.
[5] K.-C. Chang,et al. Low-power algorithm for automatic topology generation for application-specific networks on chips , 2008, IET Comput. Digit. Tech..
[6] Luca Benini,et al. NoC synthesis flow for customized domain specific multiprocessor systems-on-chip , 2005, IEEE Transactions on Parallel and Distributed Systems.
[7] Krishnan Srinivasan,et al. ISIS: a genetic algorithm based technique for custom on-chip interconnection network synthesis , 2005, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design.
[8] Liu Zheng,et al. Application-aware generation and optimization for NoC topology , 2009, 2009 IEEE Youth Conference on Information, Computing and Telecommunication.
[9] Luca Benini,et al. Networks on Chips : A New SoC Paradigm , 2022 .
[10] Vijay Laxmi,et al. Genetic algorithm based topology generation for application specific Network-on-Chip , 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.
[11] Krishnan Srinivasan,et al. Linear programming based techniques for synthesis of network-on-chip architectures , 2006, IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings..
[12] Radu Marculescu,et al. Energy-aware mapping for tile-based NoC architectures under performance constraints , 2003, ASP-DAC '03.
[13] Glenn Leary,et al. Design of Network-on-Chip Architectures With a Genetic Algorithm-Based Technique , 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.